All answers and outputs verified on Qiskit 2.5.1 with /home/kartikey_purohit/development/ibm-qiskit/.venv/bin/python.

Question answers

Q1 — B (3 2 5). num_qubits is 3 and num_clbits is 2, straight from the constructor. width() is the total number of wires, quantum plus classical, so 3 + 2 = 5. Answer A is the classic trap of thinking width only counts qubits.

Q2 — B. The drawing shows H on the top wire (q_0), the CX control dot on q_0 and the ⊕ target on q_1, then measures into clbits 0 and 1. Option A puts H and the control on q_1 (bottom). Option C reverses control/target. Option D uses cz (drawn as two dots, no ⊕) and measure_all, which would add a meas register instead of c.

Q3 — C (OrderedDict({'measure': 2, 'h': 1, 'cx': 1, 'barrier': 1})). measure_all() first inserts a barrier, then measures every qubit into a brand-new meas register, so the barrier appears in count_ops(). D is wrong because measure_all() creates the classical register itself.

Q4 — B (depth 3). The three h gates all run in parallel as layer 1. cx(0,1) must follow the h's (layer 2), and cx(1,2) shares qubit 1 with the previous cx so it becomes layer 3. Depth is the longest path, not the gate count (which is 5).

Q5 — B ({'01': 100}). Qiskit is little-endian: qubit 0 is the least significant (rightmost) bit of the counts key. x(0) flips q0, so the string reads q1 q0 = 01. There is no randomness — the state is a computational basis state, so all 100 shots agree.

Q6 — C (4 ['c', 'meas']). The circuit already had a 2-bit register c; measure_all() adds another 2-bit register named meas rather than reusing the existing bits, giving 4 clbits total. To reuse existing clbits you must call measure_all(add_bits=False).

Q7 — B only. qc.id(0) exists (the identity gate). qc.cnot and qc.toffoli were deprecated aliases that are removed in Qiskit 2.x — only cx and ccx remain. qc.i does not exist either (hasattr returns False for all three).

Q8 — B (['tdg', 'sdg']). Inverting a circuit reverses the order of the operations and replaces each gate with its adjoint: (S·T)⁻¹ = T†·S†... applied in circuit order that is tdg first, then sdg. A dagger-only or reverse-only answer is the trap.

Q9 — B (1 2). compose() returns a new circuit containing a's h plus b's cx (2 instructions) and leaves a untouched (still 1 instruction). It only mutates the receiver when you pass inplace=True.

Q10 — B. to_gate() requires the circuit to be unitary; the exact error is QiskitError: 'Circuit with classical bits cannot be converted to gate.'. For circuits containing measure/reset you must use to_instruction() instead — but even that is something you call explicitly; to_gate() never falls back to it (so D is wrong).

Q11 — B ({'10': 0.5, '11': 0.5}). In a.tensor(b) the argument b occupies the lower wires, so h1 lands on q0 and x1 on q1. q1 is definitely 1 (from X) and q0 is 0/1 with probability ½ each; reading q1 q0 gives 10 and 11.

Q12 — D (ccx 3). Controlling an XGate with 2 extra control qubits yields a gate that Qiskit recognizes as the Toffoli, named ccx, acting on 2 controls + 1 target = 3 qubits. It is not named mcx for the 2-control case.

Q13 — C (2 2). The barrier prevents x(1) from sliding into the same layer as h(0), so depth is 2 (it would be 1 without the barrier). But size() excludes barriers, so size is 2, not 3 — while len(qc.data) would be 3 and count_ops() lists the barrier.

Q14 — B (4 and 3). In the chain, every cx shares a qubit with the previous one: h → cx → cx → cx is a 4-layer critical path. In the tree, cx(0,2) and cx(1,3) act on disjoint qubit pairs and run in parallel in layer 3. Both produce the identical GHZ state (Statevector.equiv returns True) — same state, better depth.

Q15 — A, B, D. T² = S and (√X)² = X by definition, and swap decomposes into three alternating CNOTs (all verified with Operator(...).equiv). C is false: rz(pi) equals Z only up to a global phase (rz(pi) is −iZ); Operator(rz) == Operator(z) returns False, while p(pi) is exactly Z.

Q16 — B ([ClassicalRegister(2, 'meas')]). measure_active() measures only qubits that have at least one non-idle operation — here q0 and q1; idle q2 is skipped. Like measure_all(), it creates a fresh register named meas, sized to the measured qubits (2, not 3).

Q17 — D (1 0). alias = qc is just a second name for the same object, so the later qc.h(0) is visible through alias (size 1). cp = qc.copy() made an independent deep copy before the h was added, so it still has size 0.

Q18 — B (['h', 'x']). front=True composes the other circuit before the existing instructions, so b's h is prepended ahead of a's x. Nothing is replaced, and front is a real keyword argument of compose().

Q19 — A and C. cz is symmetric (a phase on |11⟩ has no distinguished control/target) and swap is symmetric by definition — Operator equality holds when the arguments are flipped. cx clearly is not, and ecr (the echoed cross-resonance hardware gate) is also not symmetric. (cp, iswap, rxx, ryy, rzz are further symmetric examples.)

Q20 — A (['000', '111']). A GHZ state is (|000⟩ + |111⟩)/√2, so only the all-zeros and all-ones bitstrings can ever be sampled. With seed=7 and 1000 shots the verified counts are {'111': 498, '000': 502}, and sorting the keys gives ['000', '111'].

Lab solutions

Lab 1 — Depth Detective

Verified output:

A depth: 3
A size:  5
A width: 3
A ops:   {'h': 2, 'cx': 2, 'x': 1}
B depth: 3
B size:  5
B ops:   {'h': 2, 'cx': 2, 'barrier': 1, 'x': 1}
C width: 6
C clbit registers: ['meas']
C depth: 4

Reasoning:

A: layer 1 = {h(0), h(1), x(2)} (x(2) floats up because q2 is idle before it), layer 2 = cx(0,1), layer 3 = cx(1,2) → depth 3. Size counts the 5 gates; width is 3 (no clbits).
B: the barrier pushes x(2) down into layer 2 (alongside cx(0,1)), but the critical path h → cx(0,1) → cx(1,2) is still 3 layers, so depth is unchanged at 3 — a barrier constrains layering but doesn't automatically add depth. size() still reports 5 because barriers are excluded from size, while count_ops() does show 'barrier': 1.
C: measure_all() adds a new 3-bit meas register (width 3 + 3 = 6). It also adds its own barrier and a layer of parallel measurements, so depth becomes 3 + 1 = 4.

Lab 2 — The Little-Endian Vault

Verified output:

Step 1 counts: {'110': 100}
Step 2 counts: {'011': 100}
Step 3 counts: {'011': 100}

Reasoning:

Step 1: 6 = binary 110 means bit0=0, bit1=1, bit2=1, so we flip q1 and q2. The counts key reads q2 q1 q0 = 110 — the little-endian convention makes the integer come out "right" when you set qubit k for bit k.
Step 2: swap(0, 2) exchanges q0 (0) and q2 (1), leaving q0=1, q1=1, q2=0 → key 011 (the number 3, i.e., 6 with its 3-bit pattern reversed).
Step 3: no swap gate, but mapping q0→c2, q1→c1, q2→c0 reverses the bits classically, producing the same 011. Lesson: you can reverse bit order either with quantum swaps or by re-wiring the measurement map — the counts string is always read c2 c1 c0 (highest clbit index leftmost).

Lab 3 — The Bell Gate Factory

Verified output:

Step 1: bell | qubits: 2
Step 2 ops: {'bell': 1, 'cx': 1}
Step 2 depth: 2
Step 2 decomposed ops: {'cx': 2, 'h': 1}
Step 3 counts: {'111': 1054, '000': 946}
Step 4 gate: cbell | qubits: 3
Step 4 counts: {'000': 1000}

Reasoning:

Step 1: to_gate() keeps the circuit's name, so the gate is called bell with 2 qubits.
Step 2: the appended Bell gate is one opaque instruction, so count_ops shows {'bell': 1, 'cx': 1} and the depth is only 2 (bell layer, then cx(1,0) which shares qubit 1). After decompose(), the bell expands to h + cx, giving {'cx': 2, 'h': 1}.
Step 3: bell on (q1, q2) entangles them, then cx(1, 0) copies q1's value onto q0 — a 3-qubit GHZ. Only 000 and 111 appear; with seed=99 and 2000 shots the split is 946 / 1054.
Step 4: .control(1) names the gate cbell (control prefix + gate name) with 3 qubits, control first. The control qubit q0 is never put in superposition — it stays |0⟩, so the controlled-bell never fires and every shot reads 000. A controlled gate with a |0⟩ control is the identity.